Unverified Commit d982018f authored by Stan Kladko's avatar Stan Kladko Committed by GitHub

Merge pull request #234 from skalenetwork/develop

Intel submission 3
parents 75fa12ed 0f286868
......@@ -38,6 +38,16 @@ jobs:
bash ./scripts/publish_image.sh sgxwallet
env:
ACTIONS_ALLOW_UNSECURE_COMMANDS: true
- name: Create Release
if: contains(github.ref, 'develop') || contains(github.ref, 'beta') || contains(github.ref, 'master') || contains(github.ref, 'stable')
id: create_release
uses: actions/create-release@latest
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
with:
tag_name: ${{ env.VERSION }}
release_name: ${{ env.VERSION }}
draft: false
prerelease: true
......@@ -41,16 +41,6 @@ jobs:
bash ./scripts/publish_image.sh sgxwallet_sim
env:
ACTIONS_ALLOW_UNSECURE_COMMANDS: true
- name: Create Release
if: contains(github.ref, 'develop') || contains(github.ref, 'beta') || contains(github.ref, 'master') || contains(github.ref, 'stable')
id: create_release
uses: actions/create-release@latest
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
with:
tag_name: ${{ env.VERSION }}
release_name: ${{ env.VERSION }}
draft: false
prerelease: true
......@@ -51,10 +51,18 @@ Then run sgxwallet using docker-compose
cd run_sgx_sim; sudo docker-compose up
```
Note: you need a machine that supports Intel AVX512 instruction set. Most modern Intel CPUs support it. To verify you machine supports AVX512, run
```
cat /proc/cpuinfo | grep avx512
```
Note: sgxwallet requires docker-compose for correct operation. You must always use
docker-compose and avoid using raw docker tools.
Note: simulation mode is only try try sgxwallet.
Note: simulation mode is only to try sgxwallet.
In production, you need to run sgxwallet on a server that supports SGX.
Never run a production sgxserver in simulation mode.
......
......@@ -115,7 +115,7 @@ void SGXWalletServer::printDB() {
#ifdef SGX_HW_SIM
#define NUM_THREADS 16
#else
#define NUM_THREADS 64
#define NUM_THREADS 200
#endif
......
......@@ -3,9 +3,9 @@
<ISVSVN>2</ISVSVN>
<StackMaxSize>0x200000</StackMaxSize>
<HeapMaxSize>0x200000</HeapMaxSize>
<TCSNum>16</TCSNum>
<TCSMaxNum>16</TCSMaxNum>
<TCSMinPool>16</TCSMinPool>
<TCSNum>256</TCSNum>
<TCSMaxNum>256</TCSMaxNum>
<TCSMinPool>256</TCSMinPool>
<TCSPolicy>0</TCSPolicy>
<!-- Recommend changing 'DisableDebug' to 1 to make the enclave undebuggable for enclave release -->
<DisableDebug>0</DisableDebug>
......
......@@ -3,9 +3,9 @@
<ISVSVN>2</ISVSVN>
<StackMaxSize>0x1000000</StackMaxSize>
<HeapMaxSize>0x100000000</HeapMaxSize>
<TCSNum>128</TCSNum>
<TCSMaxNum>128</TCSMaxNum>
<TCSMinPool>128</TCSMinPool>
<TCSNum>256</TCSNum>
<TCSMaxNum>256</TCSMaxNum>
<TCSMinPool>256</TCSMinPool>
<TCSPolicy>0</TCSPolicy>
<!-- Recommend changing 'DisableDebug' to 1 to make the enclave undebuggable for enclave release -->
<DisableDebug>1</DisableDebug>
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment