SKALE-3596 Intel submission. Bumped version.

secure_enclave/SIGNED_ENCLAVE_VERSION

-#define SIGNED_ENCLAVE_VERSION "3"
\ No newline at end of file
+#define SIGNED_ENCLAVE_VERSION "2"
\ No newline at end of file

secure_enclave/secure_enclave.config.xml

 <EnclaveConfiguration>
  <ProdID>0</ProdID>
- <ISVSVN>1</ISVSVN>
- <StackMaxSize>0x1000000</StackMaxSize>
- <HeapMaxSize>0x100000000</HeapMaxSize>
- <TCSNum>128</TCSNum>
- <TCSMaxNum>128</TCSMaxNum>
- <TCSMinPool>128</TCSMinPool>
+ <ISVSVN>2</ISVSVN>
+ <StackMaxSize>0x200000</StackMaxSize>
+ <HeapMaxSize>0x200000</HeapMaxSize>
+ <TCSNum>16</TCSNum>
+ <TCSMaxNum>16</TCSMaxNum>
+ <TCSMinPool>16</TCSMinPool>
  <TCSPolicy>0</TCSPolicy>
  <!-- Recommend changing 'DisableDebug' to 1 to make the enclave undebuggable for enclave release -->
  <DisableDebug>0</DisableDebug>

secure_enclave/secure_enclave.config.xml.release

 <EnclaveConfiguration>
  <ProdID>0</ProdID>
- <ISVSVN>1</ISVSVN>
+ <ISVSVN>2</ISVSVN>
  <StackMaxSize>0x1000000</StackMaxSize>
  <HeapMaxSize>0x100000000</HeapMaxSize>
  <TCSNum>128</TCSNum>

secure_enclave/secure_enclave.config.xml.sim

 <EnclaveConfiguration>
  <ProdID>0</ProdID>
- <ISVSVN>1</ISVSVN>
+ <ISVSVN>2</ISVSVN>
  <StackMaxSize>0x200000</StackMaxSize>
  <HeapMaxSize>0x200000</HeapMaxSize>
  <TCSNum>20</TCSNum>